1. Field of the Invention
The present invention relates to electrostatic protection circuits, and more particularly to an electrostatic protection circuit having the input capacitance thereof lowered using a protection element which protects a semiconductor device from the flowing-in of a surge or the like.
2. Related Art
An electrostatic protection circuit is generally connected between a first power supply terminal and second power supply terminal having a lower potential than the first power supply terminal, and is constituted of diodes, etc. connected in plural stages from an anode in the second power supply terminal side to a cathode in the first power supply terminal side. To an intermediate connection point of the plural stages of diodes, there is connected the connection point between an input/output terminal and internal circuit. When the circuit is configured in this way, even when a surge of any polarity (positive or negative) is introduced between any two terminals, a path for discharging the surge is formed.
In such configuration, there parasitically exist junction capacitances of diodes between the input/output terminal and first power supply terminal and between the input/output terminal and second power supply terminal. Consequently, for an input/output terminal which inputs and outputs high-speed signals, the waveform of a signal is deteriorated by this parasitic capacitance; therefore it is important to lower the capacitance.
Accordingly, there has been proposed a circuit as described in Japanese Patent No. 3022674 (referred to below as Patent Document). In an electrostatic protection circuit shown in FIG. 3 of Patent Document, a pair of diodes is connected in series between the input/output terminal and positive power supply terminal so as for the cathode electrodes thereof to form a common connection point, and a pair of diodes is connected in series between the input/output terminal and negative power supply terminal so as for the cathode electrodes thereof to form a common connection point, whereby a lowering of the input capacitance can be implemented.
However, in the circuit configuration as shown in FIG. 3 of Patent Document, for example, when a positive surge is introduced in the input/output terminal side between the input/output terminal and negative power supply terminal, a surge can escape using the reverse breakdown current of the diode. The reverse breakdown voltage of an ordinary diode is typically about 10 V; thus, at least a voltage of 10 V is applied to the internal circuit to be protected. As the insulating film of the internal circuit becomes thinner, the protection of the internal circuit cannot be achieved with the circuit configuration of Patent Document.
In a diode, the permissible current during reverse operation is generally smaller than that during forward operation, so the discharge capacity during reverse operation in ESD (Electro-Static Discharge) is low, thereby causing a problem. Further, there is a risk that, during ordinary operation, a diode (reference number 13 of FIG. 3 in Patent Document) whose anode is connected to the input/output terminal side and whose cathode is connected to the negative power supply terminal side, is biased in a forward direction, and consequently, a signal from the input/output terminal is clamped by the diode.